1. Field of the invention
The present invention relates generally to a pad redistribution chip, a method for manufacturing the same, and a stacked package using the same, and more particularly to a stacked package, which has its pads redistributed on chips for compactness.
2. Description of the Prior Art
As generally known in the art, a semiconductor package has a number of chips (fabricated in a wafer process) that are electrically connected to each another in the package. The package is sealed and packaged so that it can be protected against external impact and used as an electronic product.
As the recent trend is to miniaturize the electronic products, the semiconductor components must be able to be mounted in a narrower space. In addition, as the electronic products increasingly involve more functions and higher performance characteristics, the type and number of the semiconductor components would increase accordingly. As a result, the semiconductor packages are also becoming more compact to increase the mounting efficiency per unit volume.
Moreover, the stacked packages have been developed such that it can arrange in a single package a number of semiconductor chips, each having different functions. This is done by stacking one type of chip(s) on different type of chip(s) mounted inside a package.
The general structure of the conventional stacked packages is shown in FIG. 1a or 1b. 
Referring to the drawings, a stacked package 10 or 20 includes: a substrate 11 or 21 having substrate bonding pads 14 or 24 on both ends thereof; a number of chips 11 or 21 stacked on the substrate 11 or 21; and wires 13 and 23 for electrically connecting the substrate 11 or 21 to the chips 12 or 22.
Each chip in the stacked package 12 or 22 has chip bonding pads 15 or 25 positioned on both ends thereof, to which the wires 13 or 23 are bonded so that the chip bonding pads 15 or 25 are connected to the substrate bonding pads 14 or 24 on the substrate 11 or 21.
However, the stacked package 10 or 20 may malfunction if the wires 13 or 23 positioned therein interfere with one another.
In order to avoid interference between the wires 13 and/or 23, the conventional techniques suggest that a number of substrate bonding pads 14 are positioned on the substrate 11 to extend the wires 13 in the horizontal direction, as shown in FIG. 1a. Alternatively, the wires 23 are extended in the vertical direction to be connected to the substrate bonding pads 24, as shown in FIG. 1b. 
However, wires extending in the horizontal or vertical direction to avoid interference between them occupy much space inside the package, in the horizontal and/or vertical directions. As a result, the package becomes bulky.
This is contrary to the current trend towards compactness of packages.